Properties of extremely thin silicon layer in silicon-on-insulator structure formed by smart-cut technology

被引:43
作者
Popov, VP [1 ]
Antonova, IV [1 ]
Stas, VF [1 ]
Gutakovskii, AK [1 ]
Spesivtsev, EV [1 ]
Mardegzhov, AS [1 ]
Franznusov, AA [1 ]
Feofanov, GN [1 ]
机构
[1] Russian Acad Sci, Inst Semicond Phys, Novosibirsk 630090, Russia
来源
MATERIALS SCIENCE AND ENGINEERING B-SOLID STATE MATERIALS FOR ADVANCED TECHNOLOGY | 2000年 / 73卷 / 1-3期
关键词
SOI; ultrathin layer; oxidation; flatness; uniformity;
D O I
10.1016/S0921-5107(99)00437-7
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The aim of the report is a creation of extremely thin silicon-on-insulator (SOI) structures for quantum devices with layer-by-layer oxidation of smart-cut SOI wafers. The present work deals with investigation of structural, optical and electronic properties of SOI structures by HRTEM, RES, and spectroscopic ellipsometry (SE), Hall and Pseudo-MOSFET measurements. It is demonstrated that this technology of SOI structure preparation provides a high flatness of interface between buried oxide (BOX) and top silicon layer. Layer-by-layer oxidation with subsequent stripping in diluted HF allows us to save the uniformity and flatness of initial SOI layers up to 10 nm film thickness. A further thinning leads to decrease of oxidation rate and non-uniform growth. A mechanism of these processes is suggested. (C) 2000 published by Elsevier Science S.A. All rights reserved.
引用
收藏
页码:82 / 86
页数:5
相关论文
共 15 条
[11]   Statistical cross-linking at the Si(111)/SiO2 interface [J].
Luh, DA ;
Miller, T ;
Chiang, TC .
PHYSICAL REVIEW LETTERS, 1997, 79 (16) :3014-3017
[12]   Single-electron transistors fabricated from a doped-Si film in a silicon-on-insulator substrate [J].
Sakamoto, T ;
Kawaura, H ;
Baba, T .
APPLIED PHYSICS LETTERS, 1998, 72 (07) :795-796
[13]   Growth of buried oxide layers of silicon-on-insulator structures by thermal oxidation of the top silicon layer [J].
Schroer, E ;
Hopfe, S ;
Tong, QY ;
Gosele, U ;
Skorupa, W .
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1997, 144 (06) :2205-2210
[14]  
Shiraishi K, 1999, MATER RES SOC SYMP P, V536, P533
[15]   Silicon single-electron quantum-dot transistor switch operating at room temperature [J].
Zhuang, L ;
Guo, LJ ;
Chou, SY .
APPLIED PHYSICS LETTERS, 1998, 72 (10) :1205-1207