Using a new technique in forming the cubic single-crystal silicon nanoparticles that are about 40 nm on a side, the authors have demonstrated a vertical-flow surround-gate Schottky-barrier transistor. This approach allows the use of well-known approaches to surface passivation and contact formation within the context of deposited single-crystal materials for device applications. It opens the door to the novel three-dimensional integrated circuits and new approaches to hyper integration. The fabrication process involves successive deposition and planarization and does not require nonoptical lithography. Device characteristics show reasonable turn-off characteristics and on-current densities of more than 10(7) A/cm(2).