A 94-μW 10-b Neural Recording Front-End for an Implantable Brain-Machine-Brain Interface Device

This paper describes a fully integrated neural recording front-end comprising a low-noise two-stage amplification circuitry and a 10-b successive approximation register (SAR)-based ADC as part of a fully implantable brain-machine-brain interface (BMBI) device for neuroanatomical rewiring of cortical circuitry in an injured brain. Fabricated using the TSMC 0.35 mu m 2P/4M n-well CMOS process, the accoupled amplification circuitry provides a maximum mid-band ac gain of similar to 52 dB and features a measured input-referred voltage noise of 3.5 mu V(rms) from 0.1 Hz to 12.8 kHz, while dissipating similar to 78 mu W from 2 V. The SAR ADC features an ENOB of similar to 9.4 for maximum sampling frequency of similar to 45 kSa/s, while dissipating only 16 mu W. Benchtop as well as in vitro measurement results in saline are reported.