A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset opamps

被引：57

作者：

Keskin, M ^{[1
]}

Moon, UK ^{[1
]}

Temes, GC ^{[1
]}

机构：

[1] Oregon State Univ, Dept Elect & Comp Engn, Corvallis, OR 97331 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2002年 / 37卷 / 07期

基金：

美国国家科学基金会;

关键词：

ADC; charge-pump circuits; delta-sigma; low voltage; sigma-delta; switched-capacitor circuits; switched opamp;

D O I：

10.1109/JSSC.2002.1015678

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The problem of low-voltage operation of switched-capacitor circuits is discussed, and several solutions based on using unity-gain-reset of the opamps are proposed. Due to the feedback structure, the opamps do not need to be switched off during the reset phase of the operation, and hence can be clocked at a high rate. A low-voltage DeltaSigma modulator, incorporating pseudodifferential unity-gain-reset opamps, is described. A test chip, realized in a 0.35-mum CMOS process and clocked at 10.24 MHz, provided a dynamic range of 80 dB and a signal-to-noise + distortion (SNDR) ratio of 78 dB for a 20-kHz signal bandwidth, and a dynamic range of 74 dB and SNDR of 70 dB for a 50-kHz bandwidth, with a IN supply voltage.

引用

页码：817 / 824

页数：8

共 24 条

[1] A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter [J].

Abo, AM ;

Gray, PR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :599-606

[2]

ATACHI T, 1990, P IEEE CUST INT CIRC

[3] Active series switch for switched-opamp circuits [J].

Baschirotto, A ;

Castello, R ;

Montagna, GP .

ELECTRONICS LETTERS, 1998, 34 (14) :1365-1366

[4] A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing [J].

Baschirotto, A ;

Castello, R .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (12) :1979-1986

[5] A low-voltage sample-and-hold circuit in standard CMOS technology operating at 40 ms/s [J].

Baschirotto, A .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2001, 48 (04) :394-399

[6]

BIDARI E, 1999, P IEEE INT S CIRC SY, V2, P49

[7] A 1-V CMOS switched-opamp switched-capacitor pseudo-2-path filter [J].

Cheung, VSL ;

Luong, HC ;

Ki, WH .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (01) :14-22

[8]

CHEUNG VSL, 2001, P INT SOL STAT CIRC, P52

[9] SWITCHED-OPAMP - AN APPROACH TO REALIZE FULL CMOS SWITCHED-CAPACITOR CIRCUITS AT VERY-LOW POWER-SUPPLY VOLTAGES [J].

CROLS, J ;

STEYAERT, M .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (08) :936-942

[10] Very low-voltage digital-audio ΔΣ modulator with 88-dB dynamic range using local switch bootstrapping [J].

Dessouky, M ;

Kaiser, A .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (03) :349-355

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