A capacitance-based methodology for work function extraction of metals on high-κ

被引：94

作者：

Jha, R

Gurganos, J

Kim, YH

Choi, R

Lee, J

Misra, V ^{[1
]}

机构：

[1] N Carolina State Univ, Dept Elect Engn, Raleigh, NC 27695 USA

[2] Univ Texas, Dept Elect Engn, Austin, TX USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2004年 / 25卷 / 06期

关键词：

dual-gate CMOS; Fermi-level pinning; gate electrodes; HfO2; high-kappa charges; metal gates; workfunction extraction;

D O I：

10.1109/LED.2004.829032

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter presents a methodology to accurately extract the work function of metal electrodes on high-kappa dielectrics with various charge distributions. A mathematical analysis including sources of errors were used to study the effect of charge distribution in gate dielectric stacks on the flatband voltage of the device. The calculations are verified by experimental results obtained for Ru-Ta alloys on HfO2 and SiO2 gate dielectric stacks. It is shown that accounting for the appropriate charge model is imperative for accurate calculation of workfunction on high-kappa/SiO2 gate dielectric stacks.

引用

页码：420 / 423

页数：4

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