Layout-based statistical modeling for the prediction of the matching properties of MOS transistors

被引：18

作者：

Conti, M ^{[1
]}

Crippa, P ^{[1
]}

Orcioni, S ^{[1
]}

Turchetti, C ^{[1
]}

机构：

[1] Univ Ancona, Dipartimento Elettron & Automat, I-60131 Ancona, Italy

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS | 2002年 / 49卷 / 05期

关键词：

mismatch; partitioned layout; statistical modeling; stochastic process;

D O I：

10.1109/TCSI.2002.1001958

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new methodology for statistical mismatch analysis of MOS transistor pairs is presented. Size and shape, as well as placement and partitioning of devices are taken into account by using a statistical approach based on stochastic process theory. The method depends on device geometry and mutual distances between devices and has been developed by first defining a transformation which maps the statistical behavior of the technological parameters considered as sources of errors into the behavior of device parameters. A useful expression for the parameter mismatch variance depending on the layout has been derived by assuming a particular form for the autocorrelation function of process parameters. Finally, the method has been used to analyze and compare the mismatch effect on several interdigitated and common-centroid structures.

引用

页码：680 / 685

页数：6

共 10 条

[1]

BASTOS J, 1996, P IEEE INT C MICR TE, V9, P17

[2] Parametric yield formulation of MOS IC's affected by mismatch effect [J].

Conti, M ;

Crippa, P ;

Orcioni, S ;

Turchetti, C .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1999, 18 (05) :582-596

[3]

CONTI M, 1999, P IEEE INT S CIRC SY, V6, P222

[4]

GUARDIANI C, 1994, PROCEEDINGS OF THE IEEE 1994 CUSTOM INTEGRATED CIRCUITS CONFERENCE, P297, DOI 10.1109/CICC.1994.379715

[5]

KARHUNEN ES, 1997, P IEEE INT S CIRC SY, V3, P1644

[6] Optimizing MOS transistor mismatch [J].

Lovett, SJ ;

Welten, M ;

Mathewson, A ;

Mason, B .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (01) :147-150

[7]

Michael C., 1993, STAT MODELING COMPUT

[8] MATCHING PROPERTIES OF MOS-TRANSISTORS [J].

PELGROM, MJM ;

DUINMAIJER, ACJ ;

WELBERS, APG .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (05) :1433-1440

[9] THRESHOLD VOLTAGE MISMATCH IN SHORT-CHANNEL MOS-TRANSISTORS [J].

STEYAERT, M ;

BASTOS, J ;

ROOVERS, R ;

KINGET, P ;

SANSEN, W ;

GRAINDOURZE, B ;

PERGOOT, A ;

JANSSENS, E .

ELECTRONICS LETTERS, 1994, 30 (18) :1546-1548

[10]

Zhang J., 1995, YIELD VARIABILITY OP

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