Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II-VI Gate Insulators

被引:32
作者
Jain, F. C. [1 ]
Suarez, E. [1 ]
Gogna, M. [1 ]
Alamoody, F. [1 ]
Butkiewicus, D. [1 ]
Hohner, R. [1 ]
Liaskas, T. [1 ]
Karmakar, S. [1 ]
Chan, P. -Y. [1 ]
Miller, B. [1 ]
Chandy, J. [1 ]
Heller, E. [1 ,2 ]
机构
[1] Univ Connecticut, Dept Elect & Comp Engn, Storrs, CT 06269 USA
[2] RSoft Design Inc, Ossining, NY USA
关键词
II-VI gate FET; quantum dot gate FET; nonvolatile memory; three-state FET; ZnMgS gate insulator FET;
D O I
10.1007/s11664-009-0755-x
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the successful use of ZnS/ZnMgS and other II-VI layers (lattice-matched or pseudomorphic) as high-k gate dielectrics in the fabrication of quantum dot (QD) gate Si field-effect transistors (FETs) and nonvolatile memory structures. Quantum dot gate FETs and nonvolatile memories have been fabricated in two basic configurations: (1) monodispersed cladded Ge nanocrystals (e.g., GeO (x) -cladded-Ge quantum dots) site-specifically self-assembled over the lattice-matched ZnMgS gate insulator in the channel region, and (2) ZnTe-ZnMgTe quantum dots formed by self-organization, using metalorganic chemical vapor-phase deposition (MOCVD), on ZnS-ZnMgS gate insulator layers grown epitaxially on Si substrates. Self-assembled GeO (x) -cladded Ge QD gate FETs, exhibiting three-state behavior, are also described. Preliminary results on InGaAs-on-InP FETs, using ZnMgSeTe/ZnSe gate insulator layers, are presented.
引用
收藏
页码:1574 / 1578
页数:5
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