Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology

被引：30

作者：

Edelstein, D ^{[1
]}

Davis, C ^{[1
]}

Clevenger, L ^{[1
]}

Yoon, M ^{[1
]}

Cowley, A ^{[1
]}

Nogami, T ^{[1
]}

Rathore, H ^{[1
]}

Agarwala, B ^{[1
]}

Arai, S ^{[1
]}

Carbone, A ^{[1
]}

Chanda, K ^{[1
]}

Cohen, S ^{[1
]}

Cote, W ^{[1
]}

Cullinan, M ^{[1
]}

Dalton, T ^{[1
]}

Das, S ^{[1
]}

Davis, P ^{[1
]}

Demarest, J ^{[1
]}

Dunn, D ^{[1
]}

Dziobkowski, C ^{[1
]}

Filippi, R ^{[1
]}

Fitzsimmons, J ^{[1
]}

Flaitz, P ^{[1
]}

Gates, S ^{[1
]}

Gill, J ^{[1
]}

Grill, A ^{[1
]}

Hawken, D ^{[1
]}

Ida, K ^{[1
]}

Klaus, D ^{[1
]}

Klymko, N ^{[1
]}

Lane, M ^{[1
]}

Lane, S ^{[1
]}

Lee, J ^{[1
]}

Landers, W ^{[1
]}

Li, WK ^{[1
]}

Lin, YH ^{[1
]}

Liniger, E ^{[1
]}

Liu, XH ^{[1
]}

Madan, A ^{[1
]}

Malhotra, S ^{[1
]}

Martin, J ^{[1
]}

Molis, S ^{[1
]}

Muzzy, C ^{[1
]}

Nguyen, D ^{[1
]}

Nguyen, S ^{[1
]}

Ono, M ^{[1
]}

Parks, C ^{[1
]}

Questad, D ^{[1
]}

Restaino, D ^{[1
]}

Sakamoto, A ^{[1
]}

机构：

[1] IBM Microelect, Hopewell Jct, NY 12533 USA

来源：

PROCEEDINGS OF THE IEEE 2004 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2004年

关键词：

D O I：

10.1109/IITC.2004.1345750

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We report a comprehensive characterization of a 90 nm CMOS technology with Cu/SiCOH low-k interconnect BEOL. Significant material and integration engineering have led to the highest reliability, without degrading the performance expected from low-k. Results are presented on every aspect of BEOL and chip-package reliability, yields, low-k film parameters, BEOL capacitances and circuit delays on functional chips. All results meet or exceed our concurrent 90 nm Cu/FTEOS technology, and support extendibility to 65 nm.

引用

页码：214 / 216

页数：3

共 5 条

[1]

CHANG W, 2001, IEEE IEDM, P643

[2] A manufacturable Copper/low-k SiOC/SiCN process technology for 90nm-node high performance eDRAM [J].

Higashi, K ;

Nakamura, N ;

Miyajima, H ;

Satoh, S ;

Kojima, A ;

Abe, J ;

Nagahata, K ;

Tatsumi, T ;

Tabuchi, K ;

Hasegawa, T ;

Kawashima, H ;

Arakawa, S ;

Matsunaga, N ;

Shibata, H .

PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2002, :15-17

[3]

MATSUURA M, 2002, ADV MET C, P493

[4]

Thompson S, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P61, DOI 10.1109/IEDM.2002.1175779

[5] Integration challenges of 0.1μm CMOS Cu/low-k interconnects [J].

Yu, KC ;

Werking, J ;

Prindle, C ;

Kiene, M ;

Ng, MF ;

Wilson, B ;

Singhal, A ;

Stephens, T ;

Huang, F ;

Sparks, T ;

Aminpur, M ;

Linville, J ;

Denning, D ;

Brennan, B ;

Shahvandi, I ;

Wang, C ;

Flake, J ;

Chowdhury, R ;

Svedberg, L ;

Solomentsev, Y ;

Kim, S ;

Cooper, K ;

Usmani, S ;

Smith, D ;

Olivares, M ;

Carter, R ;

Eggenstein, B ;

Strozewski, K ;

Junker, K ;

Goldberg, C ;

Filipiak, S ;

Martin, J ;

Grove, N ;

Ramani, N ;

Ryan, T ;

Mueller, J ;

Guvenilir, A ;

Zhang, D ;

Ventzek, P ;

Wang, V ;

Lii, T ;

King, C ;

Crabtree, P ;

Farkas, J ;

Iacoponi, J ;

Pellerin, J ;

Melnick, B ;

Woo, M ;

Weitzman, E .

PROCEEDINGS OF THE IEEE 2002 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2002, :9-11

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