Lattice-Mismatched In0.4Ga0.6As Source/Drain Stressors With In Situ Doping for Strained In0.53Ga0.47As Channel n-MOSFETs

We report the first demonstration of a strained In0.53Ga0.47As channel n-MOSFET featuring in situ doped In0.4Ga0.6As source/drain (S/D) regions. The in situ silicon-doped In0.4Ga0.6As S/D was formed by a recess etch and a selective epitaxy of In0.4Ga0.6As in the S/D by metal-organic chemical vapor deposition. A lattice mismatch of similar to 0.9% between In0.53Ga0.47As and In0.4Ga0.6As As S/D gives rise to lateral tensile strain and vertical compressive strain in the In0.53Ga0.47As channel region. In addition, the in situ Si-doping process increases the carrier concentration in the S/D regions for series-resistance reduction. Significant drive-current improvement over the control n-MOSFET with Si-implanted In0.53Ga0.47As S/D regions was achieved. This is attributed to both the strain-induced band-structure modification in the channel that reduces the effective electron mass along the transport direction and the reduction in the S/D series resistance.