A 7 level metallization with Cu Damascene process using newly developed abrasive free polishing

被引：14

作者：

Yamaguchi, H ^{[1
]}

Ohashi, N ^{[1
]}

Imai, T ^{[1
]}

Torii, K ^{[1
]}

Noguchi, J ^{[1
]}

Fujiwara, T ^{[1
]}

Saito, T ^{[1
]}

Owada, N ^{[1
]}

Homma, Y ^{[1
]}

Kondo, S ^{[1
]}

Hinode, K ^{[1
]}

机构：

[1] Hitachi Ltd, Device Dev Ctr, Tokyo 1988512, Japan

来源：

PROCEEDINGS OF THE IEEE 2000 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2000年

关键词：

D O I：

10.1109/IITC.2000.854343

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 7 level metallization including 4 levels of Cu metallization by the damascene technique is successfully developed using newly developed abrasive free polishing(AFP). This new AFP process reduced erosion and dishing, defect density, and improved TDDB lifetime of dielectric layers. We also improved corrosion resistance for Cu wiring. This process was used to fabricate a metallization structure of a new-cache memory chip consisting of 9-Mb 0.6-ns SRAMs and 200-K 25ps ECL gate arrays. And this Cu metallization suppresses parasitic capacitance of interconnects and reduces clock wiring delay by 30%.

引用

页码：264 / 266

页数：3

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