An integrated CMOS distributed amplifier utilizing packaging inductance

被引：43

作者：

Sullivan, PJ ^{[1
]}

Xavier, BA ^{[1
]}

Ku, WH ^{[1
]}

机构：

[1] HUGHES NETWORK SYST,SAN DIEGO,CA 92121

来源：

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES | 1997年 / 45卷 / 10期

基金：

美国国家科学基金会;

关键词：

CMOS integrated circuits; distributed amplifiers; microwave FET amplifiers; MOSFET amplifiers; packaging; waveguide components;

D O I：

10.1109/22.641806

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An integrated CMOS distributed amplifier is presented. The required inductance needed for the distributed waveguide structure is realized by the parasitic packaging inductance of a plastic surface-mount package, A fully packaged three-stage distributed amplifier fabricated in a 0.8-mu m CMOS process is presented, The distributed amplifier has a unity gain cutoff frequency of 4.7 GHz, a gain of 5 dB, with a gain flatness of +/-1.2 dB over the 300-kHz to 3-GHz band, At a frequency of 2 GHz the amplifier has an input referred third-order intercept point of +15 dBm and an input referred l-dB compression point of +7 dBm, The amplifier consumes 18 mA from a 3.0-V supply, The distributed amplifier is matched to 50 Omega at the input and output and has a maximum input voltage standing-wave ratio (VSWR) of 1.7:1, and a maximum output VSWR of 1.3:1 over the 300 kHz to 3 GHz band, The amplifier has a noise figure of 5.1 dB at 2 GHz.

引用

页码：1969 / 1976

页数：8

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