Analysis of the power delivery path from the 12-V VR to the microprocessor

被引：53

作者：

Ren, YC ^{[1
]}

Yao, KW ^{[1
]}

Ming, X ^{[1
]}

Lee, FC ^{[1
]}

机构：

[1] Virginia Polytech Inst & State Univ, Ctr Power Elect Syst, Blacksburg, VA 24061 USA

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 2004年 / 19卷 / 06期

基金：

美国国家科学基金会; 欧洲研究理事会;

关键词：

high frequency; power delivery path; two-stage; voltage regulation module (VRM);

D O I：

10.1109/TPEL.2004.836679

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper offers a thorough analysis of the power delivery path. Based on the power delivery path model, the current slew rate of each loop is derived. The relationship between the inductor current slew rate of the voltage regulator (VR) and the bandwidth is also derived. Then, the level of the voltage spike across the capacitors of each loop is determined, after which the relationship between the bandwidth and the capacitance can be plotted. We find that for today's power delivery structure, the bulk capacitors can be eliminated as long as the bandwidth is pushed beyond 350 kHz. The experimental results of a 2-MHz two-stage 12-V VR verify this analysis.

引用

页码：1507 / 1514

页数：8

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