Gate oxide breakdown under current limited constant voltage stress

被引：86

作者：

Linder, BP ^{[1
]}

Stathis, JH ^{[1
]}

Wachnik, RA ^{[1
]}

Wu, E ^{[1
]}

Cohen, SA ^{[1
]}

Ray, A ^{[1
]}

Vayshenker, A ^{[1
]}

机构：

[1] IBM Corp, Div Res, TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIT.2000.852830

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Ultra-thin oxide reliability has become an important issue in integrated circuit scaling. Present reliability methodology stresses oxides with a low impedance voltage source. This, though, does not represent the stress under circuit configurations, in which transistors are driven by other transistors. A Current Limited Constant Voltage Stress simulates circuit stress well. Limiting the current during the breakdown event reduces the post-breakdown conduction. Limiting the current to a sufficiently low value may prevent device failure, altogether.

引用

页码：214 / 215

页数：2

共 5 条

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