Investigation of the electrical degradation of a metal-oxide-silicon capacitor by scanning thermal microscopy

A scanning thermal microscope is used to study the temperature distribution on the gate surface of a MOS structure submitted to an electric stress. Over a threshold of stress current intensity, hot spots have been observed and then numbered versus stress conditions. The data analysis shows that the hot spots number depends on injected current and also on the MOS structure degradation history. The temperature map of the gate surface is riddled with hot spots since the sample breakdown. Otherwise, hot spots seem to appear in privileged areas like the gate borders. On the basis of the literature, our observations lead us to conclude that hot spots result of degradations inside the structure. (C) 2002 Elsevier Science Ltd. All rights reserved.