Review of the wafer stage for nanoimprint lithography

被引:79
作者
Lan, Hongbo [1 ]
Ding, Yucheng
Liu, Hongzhong
Lu, Bingheng
机构
[1] Shandong Univ, Sch Mech Engn, Jinan 250061, Peoples R China
[2] Xi An Jiao Tong Univ, State Key Lab Mfg Syst Engn, Xian 710049, Peoples R China
基金
中国博士后科学基金;
关键词
nanoimprint lithography; substrate stage; ultra-precision positioning; passive compliant stage; active control stage; FLASH IMPRINT LITHOGRAPHY; STEP;
D O I
10.1016/j.mee.2007.01.002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Nanoimprint lithography (NIL) has been flagged as one of the most promising processes for next generation lithography due to its simplicity, low cost, high replication fidelity and relatively high throughput. As a key subsystem, the ultra-precision positioning substrate stage plays a particularly critical role for NIL machines. This paper summarizes firstly various schemes of substrate stages. Subsequently, the issue of actively controlled stages versus passive compliant stages is to be discussed. Furthermore, based on the investigation for numerous ultra-precision positioning stages and considering the practically functional requirements for the step and flash imprint lithography (SFIL) machine, two preliminary schemes to implement the six-degree-of-freedom active control for SFIL stage with multi-step and multi-level functions were proposed. Finally, some useful conclusions are presented. As a result, the objective of the investigation is to offer some proposals and schemes to develop a practical SFIL stepper and further improving the performance of current SFIL machines. (c) 2007 Elsevier B.V. All rights reserved.
引用
收藏
页码:684 / 688
页数:5
相关论文
共 10 条
[1]   Design of orientation stages for step and flash imprint lithography [J].
Choi, BJ ;
Sreenivasan, SV ;
Johnson, S ;
Colburn, M ;
Wilson, CG .
PRECISION ENGINEERING-JOURNAL OF THE INTERNATIONAL SOCIETIES FOR PRECISION ENGINEERING AND NANOTECHNOLOGY, 2001, 25 (03) :192-199
[2]   Passive compliant wafer stage for single-step nano-imprint lithography [J].
Choi, KB ;
Lee, JJ .
REVIEW OF SCIENTIFIC INSTRUMENTS, 2005, 76 (07)
[3]   Imprint lithography with sub-10 nm feature size and high throughput [J].
Chou, SY ;
Krauss, PR .
MICROELECTRONIC ENGINEERING, 1997, 35 (1-4) :237-240
[4]   Sub-10 nm imprint lithography and applications [J].
Chou, SY ;
Krauss, PR ;
Zhang, W ;
Guo, LJ ;
Zhuang, L .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1997, 15 (06) :2897-2904
[5]   IMPRINT OF SUB-25 NM VIAS AND TRENCHES IN POLYMERS [J].
CHOU, SY ;
KRAUSS, PR ;
RENSTROM, PJ .
APPLIED PHYSICS LETTERS, 1995, 67 (21) :3114-3116
[6]   Step and flash imprint lithography: A new approach to high-resolution patterning [J].
Colburn, M ;
Johnson, S ;
Stewart, M ;
Damle, S ;
Bailey, T ;
Choi, B ;
Wedlake, M ;
Michaelson, T ;
Sreenivasan, SV ;
Ekerdt, J ;
Willson, CG .
EMERGING LITHOGRAPHIC TECHNOLOGIES III, PTS 1 AND 2, 1999, 3676 :379-389
[7]   Recent progress in nanoimprint technology and its applications [J].
Guo, LJ .
JOURNAL OF PHYSICS D-APPLIED PHYSICS, 2004, 37 (11) :R123-R141
[8]  
JOHNSON S, 1999, SELECTIVELY COMPLIAN
[9]  
MCMACKIN I, 2003, P SPIE INT SOC OPT E, P178
[10]   Improved step and flash imprint lithography templates for nanofabrication [J].
Resnick, DJ ;
Mancini, D ;
Dauksher, WJ ;
Nordquist, K ;
Bailey, TC ;
Johnson, S ;
Sreenivasan, SV ;
Ekerdt, JG ;
Willson, CG .
MICROELECTRONIC ENGINEERING, 2003, 69 (2-4) :412-419