One-level gray-tone design - Mask data preparation and pattern transfer

被引:22
作者
Reimer, K
Henke, W
Quenzer, HJ
Pilz, W
Wagner, B
机构
[1] Fraunhofer-Inst. Silicon T., D-14199 Berlin
关键词
Algorithms - CMOS integrated circuits - Data handling - Data structures - Etching - Masks - Microelectronic processing - Photoresists - Pulse width modulation - Semiconducting silicon - Three dimensional - Transfer functions;
D O I
10.1016/0167-9317(95)00309-6
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One-level gray-tone lithography, in spite of using common mask technique and CMOS equipment, has quite different demands on data preparation and wafer processing. This paper reports on algorithms to transfer an initial height profile H-i(x,y) into a design representation shape nr(x,y) in the common data format GDSII, which could be used directly by a commercial mask shop. The great data amount of a reticle layout has been reduced significantly by a first order data compaction. The possibly nonlinear influences of the different process steps on the transfer function have been regarded. The specific parameters for the mask making and the resist process are determined. In the field of resist pattern transfer into a substrate material, a silicon etching process was evaluated.
引用
收藏
页码:559 / 562
页数:4
相关论文
共 3 条
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