共 10 条
- [1] Analysis of Si-Ge source structure in 0.15 mu m SOI MOSFETs using two-dimensional device simulation [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1996, 35 (2B): : 992 - 995
- [2] Reduction of charge build-up during reactive ion etching by using silicon-on-insulator structures [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1997, 36 (3B): : 1505 - 1508
- [3] ARITA K, 1997, 1997 INT C SOL STAT, P146
- [4] A P-CHANNEL MESFET ON SILICON USING AN ERBIUM GATE [J]. SOLID-STATE ELECTRONICS, 1985, 28 (09) : 913 - 915
- [5] COLLINGE JP, 1991, SILICON ON INSULATOR
- [6] FURUKAWA S, 1987, SOI KOZO KEISEI GIJU
- [7] MATLOUBIAN M, 1992, ELECTROCHEMICAL SOC, P64
- [8] Formation of SiGe source drain using Ge implantation for floating-body effect resistant SOI MOSFETs [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1996, 35 (2B): : 954 - 959
- [9] SARAYA T, 1997, 1997 INT C SOL STAT, P554
- [10] TSUCHIYA T, 43 SPRING M 1996 JAP