A dynamic voltage scaled microprocessor system

被引：443

作者：

Burd, TD ^{[1
]}

Pering, TA

Stratakos, AJ

Brodersen, RW

机构：

[1] Univ Calif Berkeley, Berkeley Wireless Res Ctr, Berkeley, CA 94704 USA

[2] Intel Corp, Hillsboro, OR 97124 USA

[3] Volterra, Fremont, CA 94538 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2000年 / 35卷 / 11期

关键词：

adaptive processor; energy efficient; low power; variable voltage;

D O I：

10.1109/4.881202

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A microprocessor system is presented in which the supply voltage and clock frequency can be dynamically varied so that the system can deliver high throughput when required while significantly extending battery life during the low speed periods. The system consists of a de-de switching regulator, an ARM V4 microprocessor with a 16-kB cache, a bank of 64-kB SRAM ICs, and an I/O interface IC, The four custom chips were fabricated in a standard 0.6-mum 3-metal CMOS process. The system can dynamically vary the supply voltage from 1.2 to 3.8 V in less than 70 mus. This provides a throughput range of 6-85 MIPS with an energy consumption of 0.54-5.6 mW/MIP yielding an effective energy efficiency as high as 26 200 MIPS/W.

引用

页码：1571 / 1580

页数：10

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