Frontiers of silicon-on-insulator

被引:542
作者
Celler, GK
Cristoloveanu, S
机构
[1] Soitec USA, Peabody, MA 01960 USA
[2] ENSERG, Inst Microelect Electromagnetism & Photon, UMR, CNRS,INPG,UJF, F-38016 Grenoble 1, France
[3] Ctr Adv Projects Microelect, Grenoble, France
关键词
D O I
10.1063/1.1558223
中图分类号
O59 [应用物理学];
学科分类号
摘要
Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics. (C) 2003 American Institute of Physics.
引用
收藏
页码:4955 / 4978
页数:24
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