A 0.10 mu m NMOSFET, made by hybrid lithography (e-beam/DUV), with indium pocket and specific gate reoxidation process

被引:5
作者
Benistant, F
Tedesco, S
Guegan, G
Martin, F
Heitzmann, M
DalZotto, B
机构
[1] LETI (CEA) 17, 38054 Grenoble cedex 9, rue des Martyrs
关键词
D O I
10.1016/0167-9317(95)00287-1
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we present a 0.10 mu m NMOS process to achieve devices with reduced short channel effect (SCE) and good current drive capability. Full compatible Chemical Amplified Resist (CAR) process between DUV and e-beam lithography allowed us to use hybride lithography at gate level. For the first time, we show that the conventional gate reoxidation is a limiting step to process integration because of the Bird's Beak formation at the poly gate edge. Consequently, this process is replaced by a low thermal oxide deposition. In addition, Indium pocket implantations have been realized to improve the SCE.
引用
收藏
页码:459 / 462
页数:4
相关论文
共 6 条
[1]   GENERALIZED SCALING THEORY AND ITS APPLICATION TO A 1/4 MICROMETER MOSFET DESIGN [J].
BACCARANI, G ;
WORDEMAN, MR ;
DENNARD, RH .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (04) :452-462
[2]  
BENISTANT F, IN PRESS ESSDERC95
[3]  
GUEGAN G, 1990, ESSDERC, P120
[4]   ELECTRON-BEAM DUV INTRA-LEVEL MIX-AND-MATCH LITHOGRAPHY FOR RANDOM LOGIC 0.25-MU-M CMOS [J].
JONCKHEERE, R ;
TRITCHKOV, A ;
VANDRIESSCHE, V ;
VANDENHOVE, L .
MICROELECTRONIC ENGINEERING, 1995, 27 (1-4) :231-234
[5]   EFFECTS OF ION-IMPLANTATION ON DEEP-SUBMICROMETER, DRAIN-ENGINEERED MOSFET TECHNOLOGIES [J].
STINSON, MG ;
OSBURN, CM .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38 (03) :487-497
[6]   EVALUATION OF A POSITIVE TONE CHEMICALLY AMPLIFIED DEEP UV RESIST FOR E-BEAM APPLICATIONS [J].
ZANDBERGEN, P ;
DIJKSTRA, HJ .
MICROELECTRONIC ENGINEERING, 1994, 23 (1-4) :299-302