A micropower CMOS, direct-conversion, VLF receiver chip for magnetic-field wireless applications

A micropower CMOS, direct-conversion very low frequency (VLF) receiver is described for receiving low-level magnetic fields from resonant sensors. The single-chip, phase locked loop (PLL)-synthesized receiver covers a frequency range of 10-82 kHz and provides both analog and 9-b digital baseband I and Q outputs. Digital I and Q outputs are accumulated in a companion digital chip which provides baseband signal processing. Emphasis is placed on the receiver micropower RF preamplifier which uses a lateral bipolar input device because of the significant increase in flicker noise illustrated for PMOS devices in weak inversion. Lateral bipolar transistors are also utilized in the mixer and IF stages for low flicker noise and low dc offsets. Special attention is given to isolating the internal local oscillator signals from the low-level RF input (0.3 mu V noise floor in 300 Hz BW), and local oscillator feedthrough is indiscernible in the RF preamplifier output noise spectrum. The 100% duty-cycle receiver, intended for miniature, battery-operated wireless applications, operates approximately four months at 80 mu A from a 6-V, 220-mA-hr battery.