A GAAS 16X16 BIT PARALLEL MULTIPLIER

被引：18

作者：

NAKAYAMA, Y

SUYAMA, K

SHIMIZU, H

YOKOYAMA, N

OHNISHI, H

SHIBATOMI, A

ISHIKAWA, H

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1983年 / 18卷 / 05期

关键词：

D O I：

10.1109/JSSC.1983.1052000

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：599 / 603

页数：5

共 5 条

[1] A HIGH-SPEED LSI GAAS 8BY8-BIT PARALLEL MULTIPLIER [J].

LEE, FS ;

KAELIN, GR ;

WELCH, BM ;

ZUCCA, R ;

SHEN, E ;

ASBECK, P ;

LEE, CP ;

KIRKPATRICK, CG ;

LONG, SI ;

EDEN, RC .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1982, 17 (04) :638-647

[2]

NAKAYAMA Y, 1982, NOV GAAS IC S TECHN, P6

[3]

SUYAMA K, 1982, 14TH P JAP C SOL STA, P341

[4] ORIENTATION EFFECT OF SELF-ALIGNED SOURCE DRAIN PLANAR GAAS SCHOTTKY-BARRIER FIELD-EFFECT TRANSISTORS [J].

YOKOYAMA, N ;

ONODERA, H ;

OHNISHI, T ;

SHIBATOMI, A .

APPLIED PHYSICS LETTERS, 1983, 42 (03) :270-271

[5] TIW SILICIDE GATE SELF-ALIGNMENT TECHNOLOGY FOR ULTRAHIGH-SPEED GAAS-MESFET LSI VLSIS [J].

YOKOYAMA, N ;

OHNISHI, T ;

ODANI, K ;

ONODERA, H ;

ABE, M .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1982, 29 (10) :1541-1547

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