THIN-FILM TRANSISTORS WITH GRADED SINX GATE DIELECTRICS

This paper presents results on thin film transistors with graded SiN(x) gate dielectrics. All SiN(x) and a-Si:H films were prepared using 250-degrees-C plasma-enhanced chemical vapor deposition processes. Device characteristics such as mobility, threshold voltage, subthreshold slope, and on/off current are discussed. The graded gate dielectric thin film transistor (TFT) may have better or worse device performance compared with the single gate dielectric TFT, depending on the interface dielectric deposition condition. The interface SiN(x) deposition process influences the intensity density of states between the a-Si:H layer and the gate SiN(x) layer as well as the states between the first and the second (interface) SiN(x) layers. The stress mismatch between the first and the second SiN(x) layers also has a profound influence on TFT characteristics.