A HIGHLY LATCHUP-IMMUNE L-MU-M CMOS TECHNOLOGY FABRICATED WITH L-MEV ION-IMPLANTATION AND SELF-ALIGNED TISI2

被引:25
作者
LAI, FSJ [1 ]
WANG, LK [1 ]
TAUR, Y [1 ]
SUN, JYC [1 ]
PETRILLO, KE [1 ]
CHICOTKA, SK [1 ]
PETRILLO, EJ [1 ]
POLCARI, MR [1 ]
BUCELOT, TJ [1 ]
ZICHERMAN, DS [1 ]
机构
[1] IBM CORP, THOMAS J WATSON RES CTR, YORKTOWN HTS, NY 10598 USA
关键词
D O I
10.1109/T-ED.1986.22664
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:1308 / 1320
页数:13
相关论文
共 36 条
[1]  
ANTONIADIS DA, 1978, 50192 STANF EL LAB T
[2]  
CURRENT MI, 1985, SPIE P LOS ANGELES
[3]   DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].
DENNARD, RH ;
GAENSSLEN, FH ;
YU, HN ;
RIDEOUT, VL ;
BASSOUS, E ;
LEBLANC, AR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268
[4]  
Estreich D. B., 1981, THESIS STANFORD U
[5]   AN ANALYTIC MODEL FOR MINORITY-CARRIER TRANSPORT IN HEAVILY DOPED REGIONS OF SILICON DEVICES [J].
FOSSUM, JG ;
SHIBIB, MA .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) :1018-1025
[7]  
Hu G. J., 1982, International Electron Devices Meeting. Technical Digest, P710
[8]   DESIGN TRADEOFFS BETWEEN SURFACE AND BURIED-CHANNEL FETS [J].
HU, GJ ;
BRUCE, RH .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1985, 32 (03) :584-588
[9]   A CMOS STRUCTURE WITH HIGH LATCHUP HOLDING VOLTAGE [J].
HU, GJ ;
BRUCE, RH .
IEEE ELECTRON DEVICE LETTERS, 1984, 5 (06) :211-214
[10]  
Lai F. S., 1985, International Electron Devices Meeting. Technical Digest (Cat. No. 85CH2252-5), P513