UNIVERSAL MOSFET HOLE MOBILITY DEGRADATION MODELS FOR CIRCUIT SIMULATION

In order to simulate complex VLSI/ULSI circuits, circuit simulators must have accurate inversion layer mobility models which properly account for mobility degradation with increasing electric field. In the conventional mobility models in circuit simulators, such as SPICE, the common practice is to refit the parameters in the model for each different processing technology, which is cumbersome, and which restricts the versatility of the model. Universal models, fortunately, can be developed which provide user-friendliness, versatility, and accuracy to circuit simulation codes. We present new universal, semi-empirical MOSFET hole inversion layer mobility degradation models for use in circuit simulation programs such as SPICE. By accurately predicting the mobility degradation due to acoustic phonon scattering and surface roughness scattering for p-channel MOSFET's at room temperature, these new models eliminate the need for fitting parameters for each technology, which is required in the current SPICE level 3 model. The new expressions reported in this paper accurately predict the mobility over a very wide range of channel doping concentrations, gate oxide thicknesses, gate voltage, and substrate bias, and agree very well with recently published experimental mobility degradation data. When implemented in a circuit simulation code, these new models will accurately determine the channel mobility in surface p-channel MOSFET's using only the channel doping concentration, gate oxide thickness, substate bias, and applied gate drive voltage as input parameters. The new models are, therefore, much more universal and a considerable improvement over the current SPICE level 3 model, which must be refitted for each different processing technology.