HIGH-SPEED LOGIC LSI USING DIFFUSION SELF-ALIGNED ENHANCEMENT DEPLETION MOS IC

被引:15
作者
OHTA, K
MORIMOTO, M
SAITOH, M
FUKUDA, T
MORINO, A
SHIMIZU, K
HAYASHI, Y
TARUI, Y
机构
[1] ELECTROTECH LAB,TOKYO,JAPAN
[2] NIPPON ELECT CO LTD,IC DIV,FUNDAMENTAL TECHNOL SECT,TOKYO,JAPAN
[3] NIPPON ELECT CO LTD,IC DIV,IST IC DESIGN ENGN DEPT,TOKYO,JAPAN
关键词
D O I
10.1109/JSSC.1975.1050617
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:314 / 321
页数:8
相关论文
共 9 条
  • [1] CAUGE TT, 1970, DEC INT EL DEV M
  • [2] DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS
    DENNARD, RH
    GAENSSLEN, FH
    YU, HN
    RIDEOUT, VL
    BASSOUS, E
    LEBLANC, AR
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) : 256 - 268
  • [3] LIN HC, 1973, IEEE T ELECTRON DEV, VED20, P275
  • [4] VMOS - HIGH-SPEED TTL COMPATIBLE MOS LOGIC
    RODGERS, TJ
    MEINDL, JD
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) : 239 - 250
  • [5] RODGERS TJ, 1975, FEB INT SOL STAT CIR, P122
  • [6] TARUI Y, 1970, DEC INT EL DEV M
  • [7] TARUI Y, 1970, MIKROELTRONIK, V4, P102
  • [8] TARUI Y, 1970, 2ND P C SOL STAT DEV, V40, P193
  • [9] TROYE NCD, 1974, FEB INT SOL STAT CIR, P12