0.4-MU-M GATE-LENGTH DEVICES FABRICATED BY CONTRAST-ENHANCED LITHOGRAPHY

被引：4

作者：

GRIFFING, BF ^{[1
]}

WEST, PR ^{[1
]}

HEATH, BA ^{[1
]}

机构：

[1] INMOS CORP, COLORADO SPRINGS, CO USA

来源：

IEEE ELECTRON DEVICE LETTERS | 1983年 / 4卷 / 09期

关键词：

D O I：

10.1109/EDL.1983.25747

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：317 / 320

页数：4

共 12 条

[1] 0.15 MU-M CHANNEL-LENGTH MOSFETS FABRICATED USING E-BEAM LITHOGRAPHY [J].

FICHTNER, W ;

WATTS, RK ;

FRASER, DB ;

JOHNSTON, RL ;

SZE, SM .

ELECTRON DEVICE LETTERS, 1982, 3 (12) :412-414

[2]

FU KY, 1982, IEEE T ELECTRON DEV, V29, P1810, DOI 10.1109/T-ED.1982.21031

[3] CONTRAST ENHANCED PHOTOLITHOGRAPHY [J].

GRIFFING, BF ;

WEST, PR .

IEEE ELECTRON DEVICE LETTERS, 1983, 4 (01) :14-16

[4]

GRIFFING BF, 1982, NOV SOC POL ENG M EL

[5]

GRIFFING BF, UNPUB POLYM ENG SCI

[6] POLYSILICON OXIDATION SELF-ALIGNED MOS (POSA MOS) - A NEW SELF-ALIGNED DOUBLE SOURCE DRAIN ION-IMPLANTATION TECHNIQUE FOR VLSI [J].

HSIA, S ;

FATEMI, R ;

TENG, TC ;

DEORNELLAS, S ;

SUN, SC ;

SKINNER, C .

ELECTRON DEVICE LETTERS, 1982, 3 (02) :40-42

[7]

Hunter W. R., 1981, IEEE Electron Device Letters, VEDL-2, P4, DOI 10.1109/EDL.1981.25319

[8]

JACKSON TN, 1979 IEDM TECH DIG, P58

[9] AN ANOMALOUS INCREASE OF THRESHOLD VOLTAGES WITH SHORTENING THE CHANNEL LENGTHS FOR DEEPLY BORON-IMPLANTED N-CHANNEL MOSFETS [J].

NISHIDA, M ;

ONODERA, H .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) :1101-1103

[10] SHORT-CHANNEL MOST THRESHOLD VOLTAGE MODEL [J].

RATNAKUMAR, KN ;

MEINDL, JD .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1982, 17 (05) :937-948

← 1 2 →