CIRCUIT TECHNIQUES FOR A VLSI MEMORY

被引：15

作者：

MANO, T ^{[1
]}

YAMADA, J ^{[1
]}

INOUE, J ^{[1
]}

NAKAJIMA, S ^{[1
]}

机构：

[1] NIPPON TELEGRAPH & TEL PUBL CORP,ATSUGI ELECT COMMUN LAB,DIV INTEGRAT PROC TECHNOL DEV,ATSUGI,KANAGAWA 24301,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1983年 / 18卷 / 05期

关键词：

D O I：

10.1109/JSSC.1983.1051979

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：463 / 470

页数：8

共 7 条

[1]

ISHIHARA M, 1982, FEB P IEEE INT SOL S, P74

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IEDA, N ;

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ARAI, E ;

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[3]

MANO T, 1983, FEB ISSCC, P234

[4] A 256K BIT DYNAMIC RAM [J].

MATSUE, S ;

YAMAMOTO, H ;

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WADA, T ;

TAMEDA, M ;

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INAGAKI, Y .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (05) :872-874

[5] ALPHA-PARTICLE-INDUCED SOFT ERRORS IN DYNAMIC MEMORIES [J].

MAY, TC ;

WOODS, MH .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1979, 26 (01) :2-9

[6]

MORIE T, UNPUB IEEE ELECTRON

[7] HOT-ELECTRON DESIGN CONSIDERATIONS FOR HIGH-DENSITY RAM CHIPS [J].

TROUTMAN, RR ;

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CHAKRAVARTI, SN .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (04) :694-704

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