PLANAR INTERCONNECTION TECHNOLOGY FOR LSI FABRICATION UTILIZING LIFT-OFF PROCESS

被引：15

作者：

EHARA, K

MORIMOTO, T

MURAMOTO, S

MATSUO, S

机构：

来源：

JOURNAL OF THE ELECTROCHEMICAL SOCIETY | 1984年 / 131卷 / 02期

关键词：

D O I：

10.1149/1.2115597

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

引用

收藏

页码：419 / 424

页数：6

相关论文

共 18 条

[1] PLANARIZATION OF PHOSPHORUS-DOPED SILICON DIOXIDE
ADAMS, AC
CAPIO, CD
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1981, 128 (02) : 423 - 429
[2] SCANNING ELECTRON-MICROSCOPE INVESTIGATION OF GLASS FLOW IN MOS INTEGRATED-CIRCUIT FABRICATION
ARMSTRONG, WE
TOLLIVER, DL
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1974, 121 (02) : 307 - 310
[3] Chen J. Y., 1982, International Electron Devices Meeting. Technical Digest, P233
[4] APPLICATION OF TRIANGULAR VOLTAGE SWEEP METHOD TO MOBILE CHARGE STUDIES IN MOS STRUCTURES
CHOU, NJ
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1971, 118 (04) : 601 - &
[5] EHARA K, 1982 S VLSI TECHN
[6] HAZUKI H, 1982 S VLSI TECHN
[7] POLYIMIDE LIFTOFF TECHNOLOGY FOR HIGH-DENSITY LSI METALLIZATION
HOMMA, Y
NOZAWA, H
HARADA, S
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (05) : 552 - 556
[8] MATSUO S, 1982, ELECTROCHEMICAL SOC, P79
[9] PLANAR MULTILEVEL INTERCONNECTION TECHNOLOGY EMPLOYING A POLYIMIDE
MUKAI, K
SAIKI, A
YAMANAKA, K
HARADA, S
SHOJI, S
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (04) : 462 - 467
[10] MULTILAYER METALLIZATION WITH PLANAR INTERCONNECT STRUCTURE UTILIZING CVD AL2O3 FILM
MUTOH, H
MIZOKAMI, Y
MATSUI, H
HAGIWARA, S
INO, M
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1975, 122 (07) : 987 - 992