LOW-TEMPERATURE (LESS-THAN-OR-EQUAL-TO 550-DEGREES-C) FABRICATION OF POLY-SI THIN-FILM TRANSISTORS

被引:53
作者
KING, TJ
SARASWAT, KC
机构
[1] Department of Electrical Engineering, Stanford University, Stanford, CA
关键词
11;
D O I
10.1109/55.145067
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-performance n- and p-channel thin-film transistors (TFT's) have been fabricated in polycrystalline silicon films using a self-aligned-gate process without exceeding 550-degrees-C. This process features the use of polycrystalline Si0.5Ge0.5 for the gate material and high-dose H+ implantation for grain-boundary passivation so that shorter process times can be used. Low threshold voltages of 2.8 and -0.2 V, and high field-effect mobilities of 35 and 28 cm2/V . s, were achieved by the NMOS and PMOS devices, respectively. The performance of these devices is comparable to that of previously reported devices fabricated using process temperatures up to 600-degrees-C, and is adequate for large-area-display peripheral driver circuits. The significant reduction in maximum process temperature makes this process advantageous for the fabrication of CMOS circuits on large-area glass substrates.
引用
收藏
页码:309 / 311
页数:3
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