INTERCONNECTION LENGTHS AND VLSI

被引：20

作者：

FERRY, DK

机构：

来源：

IEEE CIRCUITS & DEVICES | 1985年 / 1卷 / 04期

关键词：

D O I：

10.1109/MCD.1985.6311992

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：39 / 42

页数：4

共 10 条

[1]

CHIBA T, 1975, IEEE T COMPUT, V27, P319

[2]

Donath W. E., 1979, IEEE Transactions on Circuits and Systems, VCAS-26, P272, DOI 10.1109/TCS.1979.1084635

[3]

GILBERT B, GAAS TECHNOLOGY

[4]

GRONDIN RO, COMMUNICATION

[5] FUNDAMENTAL LIMITS IN DIGITAL INFORMATION-PROCESSING [J].

KEYES, RW .

[6] PIN VERSUS BLOCK RELATIONSHIP FOR PARTITIONS OF LOGIC GRAPHS [J].

LANDMAN, BS ;

RUSSO, RL .

[7]

MANDELBROT BB, 1977, FRACTALS FORM CHANCE, P237

[8]

McGroddy J. C., 1982, International Electron Devices Meeting. Technical Digest, P2

[9]

Mead C., 1980, INTRO VLSI SYSTEMS

[10] AN NMOS-VLSI PROCESS FOR FABRICATION OF A 32-BIT CPU CHIP [J].

MIKKELSON, JM ;

HALL, LA ;

MALHOTRA, AK ;

SECCOMBE, SD ;

WILSON, MS .