A REDUNDANCY CIRCUIT FOR A FAULT-TOLERANT 256K MOS RAM

被引：16

作者：

MANO, T

WADA, M

IEDA, N

TANIMOTO, M

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1982年 / 17卷 / 04期

关键词：

D O I：

10.1109/JSSC.1982.1051803

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：726 / 731

页数：6

共 9 条

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[9] LASER PROGRAMMABLE REDUNDANCY AND YIELD IMPROVEMENT IN A 64K DRAM [J].

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