CMOS SWITCHED-CURRENT LADDER FILTERS

The design and implementation of switched-current (SI) ladder filters is described. SI filters require only a standard digital CMOS process and the power supply voltage requirement is low. Using current rather than voltage to represent signals, ladder filters have been implemented using basic SI building blocks. SI circuits can be potentially operated at higher frequencies than switched-capacitor (SC) filters due to the low-impedance wide-band nodes of the current mirrors. A simple method has been developed to design SI ladder filters with maximum dynamic range that leverages the well-established design methodologies of SC filters. A standard digital 2-μm n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to the switched-capacitor technique. © 1990 IEEE