DESIGN AND TESTING OF FAST, LOW-POWER, LOW-NOISE AMPLIFIER COMPARATOR VLSI CIRCUITS

被引:2
作者
DABROWSKI, W [1 ]
SADROZINSKI, HFW [1 ]
DEWITT, J [1 ]
机构
[1] UNIV CALIF SANTA CRUZ,SANTA CRUZ INST PARTICLE PHYS,SANTA CRUZ,CA 95064
关键词
D O I
10.1016/0168-9002(92)90514-5
中图分类号
TH7 [仪器、仪表];
学科分类号
0804 ; 080401 ; 081102 ;
摘要
We have designed and fabricated through MOSIS two amplifier-comparator chips using BICMOS technology for use with silicon strip detectors. The chips use BJT, JFET, MOSFET, and capacitor devices. BJT-MOS and BJT-JFET based amplifiers and comparators are implemented in various configurations. The resulting amplifiers provide good performance at less than 1 mW power per channel and illustrate the potential for such performance of circuits using BJT active devices with active loads of CMOS or JFET transistors.
引用
收藏
页码:199 / 203
页数:5
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