A 10-B 15-MHZ CMOS RECYCLING 2-STEP A/D CONVERTER

A two-step recycling technique is applied to implement a 10-b CMOS analog-to-digital (A/D) converter with a video conversion rate of 15 Msample/s. In a prototype digitally corrected converter, one capacitor-array multiplying digital-to-analog converter (MDAC) is used repeatedly as a sample-and-hold (S/H) amplifier, a DAC, and a residue amplifier so that the proposed converter may obtain linearity with the capacitor-array matching. An experimental fully differential A/D converter implemented using a double-poly 1-μ.m CMOS technology consumes 250 mW with a 5-V single supply, and its active die area including all digital logic and output buffers is 1.75 mm2 (2700 mil2). © 1990 IEEE