DIELECTRIC ISOLATION TECHNIQUES FOR INTEGRATED-CIRCUITS

[1] ALLISON DF, 1969, ELECTRONICS, P112

[2] SILICON-ON-SAPPHIRE COMPLEMENTARY MOS MEMORY CELLS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1967, SC 2 (04) : 208 - &

[3] BAKER WD, 1973, ELECTRONICS 0329, P65

[4] APPLICATION OF SILICON CRYSTAL ORIENTATION AND ANISOTROPIC EFFECTS TO CONTROL OF CHARGE SPREADING IN DEVICES [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (03) : 111 - 117

[5] BEAN KE, 1973, SEMICONDUCTOR SILICO, P880

[6] BEYEN WJ, 1973, SEMICONDUCTOR SILICO, P1

[7] Bosnell J. R., 1971, Microelectronics, V3, P33

[8] BOSNELL JR, 1974, 4TH EUR SOL STAT DEV

[9] Brack K., 1973, Crystal Lattice Defects, V4, P109

[10] BRACK K, 1972, Patent No. 1274726

[1] ALLISON DF, 1969, ELECTRONICS, P112

[2] SILICON-ON-SAPPHIRE COMPLEMENTARY MOS MEMORY CELLS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1967, SC 2 (04) : 208 - &

[3] BAKER WD, 1973, ELECTRONICS 0329, P65

[4] APPLICATION OF SILICON CRYSTAL ORIENTATION AND ANISOTROPIC EFFECTS TO CONTROL OF CHARGE SPREADING IN DEVICES [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (03) : 111 - 117

[5] BEAN KE, 1973, SEMICONDUCTOR SILICO, P880

[6] BEYEN WJ, 1973, SEMICONDUCTOR SILICO, P1

[7] Bosnell J. R., 1971, Microelectronics, V3, P33

[8] BOSNELL JR, 1974, 4TH EUR SOL STAT DEV

[9] Brack K., 1973, Crystal Lattice Defects, V4, P109

[10] BRACK K, 1972, Patent No. 1274726