THE POLARITY, FIELD AND FLUENCE DEPENDENCE OF INTERFACE TRAP GENERATION IN THIN SILICON-OXIDE

The interface trap generation in thin silicon oxide (SiO) during high-voltage stressing has been measured for oxides fabricated on p- and n-type substrates as a function of stress polarity, field and fluence. The generation of midgap interface traps was independent of stress polarity and substrate type and was dependent on the fluence of electrons through the oxide modulated by the stress voltage. The interface trap generation rate varied as (fluence)-1/2. Generation rates of midgap interface traps as high as 10(16) states eV-1 C-1 were measured at low fluences with the generation rate dropping to 10(12) states eV-1 C-1 at high fluences as the oxide approached breakdown. The large variation in the interface trap generation rate suggested that high-voltage stress measurements may not be easily extrapolated to lower operating voltages. It has been proposed that the decrease in the trap generation rates as the fluence increased was due to the variable energies required for the breaking of bonds at the silicon-oxide interface. The polarity independence of the interface trap generation was in contrast to the polarity dependence observed in breakdown of SiO. Thus, breakdown in SiO was not correlated with interface trap generation.