ASYMPTOTIC WAVE-FORM EVALUATION FOR TRANSIENT ANALYSIS OF 3-D INTERCONNECT STRUCTURES

被引:16
作者
KUMASHIRO, S [1 ]
ROHRER, RA [1 ]
STROJWAS, AJ [1 ]
机构
[1] CARNEGIE MELLON UNIV,DEPT ELECT & COMP ENGN,PITTSBURGH,PA 15213
关键词
D O I
10.1109/43.238035
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes a new approach to time response computation of an arbitrary 3-D interconnect structure. This technique is based on Asymptotic Waveform Evaluation (AWE) and has been implemented in a software tool called 3DAWE. To facilitate the application of AWE to a 3-D RC mesh network model, the AWE formulation is rederived based upon a nodal analysis approach. The ICCG matrix solver has been successfully applied in 3DAWE. It is shown that a typical transient response of a reasonably large 3-D RC network can be obtained within a few minutes on a 15 MIPS computer by using this program.
引用
收藏
页码:988 / 996
页数:9
相关论文
共 19 条
[1]   VLSI WIRING CAPACITANCE [J].
COTTRELL, PE ;
BUTURLA, EM .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1985, 29 (03) :277-288
[2]  
DRIESSEN M, 1991, 4TH P INT C SIM SEM, P45
[3]   A ULSI 2-D CAPACITANCE SIMULATOR FOR COMPLEX STRUCTURES BASED ON ACTUAL PROCESSES [J].
FUKUDA, S ;
SHIGYO, N ;
KATO, K ;
NAKAMURA, S .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1990, 9 (01) :39-47
[4]  
GOPAL N, 1991, 13TH P IMACS WORLD C
[5]  
HUANG X, 1990, P IEEE INT C COMPUTE, P534
[6]   ITERATIVE SOLUTION METHOD FOR LINEAR-SYSTEMS OF WHICH COEFFICIENT MATRIX IS A SYMMETRIC M-MATRIX [J].
MEIJERINK, JA ;
VANDERVORST, HA .
MATHEMATICS OF COMPUTATION, 1977, 31 (137) :148-162
[7]   A RESISTANCE CALCULATION ALGORITHM AND ITS APPLICATION TO CIRCUIT EXTRACTION [J].
MITSUHASHI, T ;
YOSHIDA, K .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (03) :337-345
[8]   FASTCAP - A MULTIPOLE ACCELERATED 3-D CAPACITANCE EXTRACTION PROGRAM [J].
NABORS, K ;
WHITE, J .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1991, 10 (11) :1447-1459
[9]  
NAGEL LW, 1975, ERLM520 U CAL EL RES
[10]   SPIDER - CAPACITANCE MODELING FOR VLSI INTERCONNECTIONS [J].
NING, ZQ ;
DEWILDE, PM .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1988, 7 (12) :1221-1228