THE FUNDAMENTAL LIMITS FOR ELECTRONIC PACKAGING AND SYSTEMS

被引：9

作者：

PENCE, WE

KRUSIUS, JP

机构：

[1] CORNELL UNIV, NATL SUBMICRON FACIL, IND AFFILIATES PROGRAM, ITHACA, NY 14850 USA

[2] CORNELL UNIV, JOINT SERV ELECTR PROGRAM, ITHACA, NY 14850 USA

来源：

IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY | 1987年 / 10卷 / 02期

关键词：

D O I：

10.1109/TCHMT.1987.1134735

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

引用

页码：176 / 183

页数：8

共 11 条

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LANDMAN, BS ;

RUSSO, RL .

[6]

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[7]

MEAD CA, 1980, INTRO VLSI SYSTEMS, P335

[8]

PELTZER DL, 1983, VLSI DESIGN SEP, P43

[9] PATH TO CONCEPTION OF JUNCTION TRANSISTOR [J].

SHOCKLEY, W .

[10]

SUZUKI S, 1984, P IEEE INT SOLID STA, P106