EVOLUTION OF DISLOCATION LOOPS IN SILICON IN AN INERT AMBIENT .2.

被引：6

作者：

CHAUDHRY, S ^{[1
]}

LIU, J ^{[1
]}

JONES, KS ^{[1
]}

LAW, ME ^{[1
]}

机构：

[1] UNIV FLORIDA,DEPT MAT SCI & ENGN,GAINESVILLE,FL 32611

来源：

SOLID-STATE ELECTRONICS | 1995年 / 38卷 / 07期

关键词：

D O I：

10.1016/0038-1101(94)00258-H

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A plan-view TEM study of the distribution, geometry and time-dependent anneal behavior of type-II dislocation loops induced by 1 x 10(15)/cm(2), 50 keV Si+ implantation into silicon was presented in Part I of this paper. A point-defect based model representing loop-to-loop interactions (Ostwald-ripening) during annealing is developed. The variation in the size and distribution of the loops as a function of anneal time and temperature is correctly simulated as part of this modeling exercise. Other quantities of interest, such as the average radii of the loop distribution are extracted from the model and directly compared with experimental values.

引用

页码：1313 / 1319

页数：7

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