LEAKAGE CURRENT REDUCTION OF POLY-SI THIN-FILM TRANSISTORS BY 2-STEP ANNEALING

被引：2

作者：

AOYAMA, T

MOCHIZUKI, Y

KAWACHI, G

OIKAWA, S

MIYATA, K

机构：

[1] Hitachi Research Laboratory Hitachi Ltd, Hitachi, Ibaraki, 319-12

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS | 1991年 / 30卷 / 1B期

关键词：

POLYSILICON; TFT; LEAKAGE CURRENT; TRAP DENSITY; SPIN DENSITY;

D O I：

10.1143/JJAP.30.L84

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Leakage currents of polysilicon TFT's (thin film transistors) were reduced significantly by a two-step annealing technique which utilized low-temperature crystallization of amorphous films and a reduction of trap states by a high-temperature process. Two-step annealing formed polysilicon films with larger grains and lower electron spin densities. Trap state densities obtained from TFT on-currents correlated strongly with the leakage currents of the TFT's.

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收藏

页码：L84 / L87

页数：4

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