COMPLETELY ITERATIVE, PIPELINED MULTIPLIER ARRAY SUITABLE FOR VLSI

被引：39

作者：

MCCANNY, JV

MCWHIRTER, JG

机构：

来源：

IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS | 1982年 / 129卷 / 02期

关键词：

D O I：

10.1049/ip-g-1.1982.0008

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：40 / 46

页数：7

共 22 条

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