HIGH-PERFORMANCE SALICIDE SHALLOW-JUNCTION CMOS DEVICES FOR SUBMICROMETER VLSI APPLICATION IN TWIN-TUB-VI

被引：15

作者：

LU, CY ^{[1
]}

SUNG, JJ ^{[1
]}

KIRSCH, HC ^{[1
]}

TSAI, NS ^{[1
]}

LIU, RC ^{[1
]}

MANOCHA, AS ^{[1
]}

HILLENIUS, SJ ^{[1
]}

机构：

[1] AT&T BELL LABS,MURRAY HILL,NJ 07974

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1989年 / 36卷 / 11期

关键词：

D O I：

10.1109/16.43677

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：2530 / 2536

页数：7

共 14 条

[1]

Chapman R. A., 1988, International Electron Devices Meeting. Technical Digest (IEEE Cat. No.88CH2528-8), P52, DOI 10.1109/IEDM.1988.32748

[2]

Chen M., 1988, International Electron Devices Meeting. Technical Digest (IEEE Cat. No.88CH2528-8), P390, DOI 10.1109/IEDM.1988.32838

[3]

Hillenius S. J., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P252

[4]

Hillenius S. J., 1985, Proceedings of IEEE International Conference on Computer Design: VLSI in Computers. ICCD '85 (Cat. No.85CH2223-6), P147

[5]

HILLENIUS SJ, 1985, Patent No. 4554726

[6] OPTIMUM DESIGN OF N+-N- DOUBLE-DIFFUSED DRAIN MOSFET TO REDUCE HOT-CARRIER EMISSION [J].

KOYANAGI, M ;

KANEKO, H ;

SHIMIZU, S .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1985, 32 (03) :562-570

[7]

LIN W, 1989, IN PRESS SOLID STATE

[8] ANOMALOUS C-V CHARACTERISTICS OF IMPLANTED POLY MOS STRUCTURE IN N+/P+ DUAL-GATE CMOS TECHNOLOGY [J].

LU, CY ;

SUNG, JM ;

KIRSCH, HC ;

HILLENIUS, SJ ;

SMITH, TE ;

MANCHANDA, L .

IEEE ELECTRON DEVICE LETTERS, 1989, 10 (05) :192-194

[9]

Parrillo L. C., 1984, International Electron Devices Meeting. Technical Digest (Cat. No. 84CH2099-0), P418

[10] RAPID THERMAL ANNEALING OF BF2+ IMPLANTED, PREAMORPHIZED SILICON [J].

SEIDEL, TE .

IEEE ELECTRON DEVICE LETTERS, 1983, 4 (10) :353-355

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