JUNCTION DEGRADATION IN BIPOLAR-TRANSISTORS AND THE RELIABILITY IMPOSED CONSTRAINTS TO SCALING AND DESIGN

被引：55

作者：

TANG, DD

HACKBARTH, E

机构：

[1] IBM T J Watson Research Cent,, Yorktown Heights, NY, USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1988年 / 35卷 / 12期

关键词：

D O I：

10.1109/16.8783

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：2101 / 2107

页数：7

共 13 条

[1]

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DELALAMO, JA ;

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[3]

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[4]

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[5]

LOGAN A, 1963, PHYS REV, V131, P89

[6]

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[7] SELF-ALIGNED BIPOLAR-TRANSISTORS FOR HIGH-PERFORMANCE AND LOW-POWER-DELAY VLSI [J].

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[8]

SOLOMON PM, 1979, ISSCC, P86

[9] TUNNELING IN BASE-EMITTER JUNCTIONS [J].

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ISAAC, RD .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1983, 30 (11) :1527-1534

[10]

Sze S. M., 1981, PHYSICS SEMICONDUCTO, P92

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