TECHNOLOGY AND PERFORMANCE OF INTEGRATED COMPLEMENTARY MOS CIRCUITS

被引：7

作者：

KLEIN, T

机构：

[1] Research and Development Laboratory, Fairchild Semiconductor, Palo Alto

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1969年 / SC 4卷 / 03期

关键词：

D O I：

10.1109/JSSC.1969.1049974

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The desirable characteristics of complementary MOS circuits are low standby power consumption, high speed, and high noise immunity. These require close control and matching of n- and p-channel transistor characteristics. Acceptable limits for mismatch between devices were derived based on circuit considerations and were related to process variables. Predicted performances were achieved using test circuits; feasibility of the technology has been shown. The reliability of fabricated test structures was evaluated. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.

引用

页码：122 / &

共 12 条

[1]

BURNS JR, 1964, RCA REV, P627

[2] BARRIER ENERGIES IN METAL-SILICON DIOXIDE-SILICON STRUCTURES [J].