MODELING OF CONDUCTANCE FLUCTUATIONS IN SMALL AREA METAL-OXIDE SEMICONDUCTOR TRANSISTORS

A theoretical analysis for the calculation of the conductance fluctuations in small area metal-oxide-semiconductor (MOS) devices is presented. This analysis relies essentially on the assumption that the trap region in the device channel can be approximated by a rectangular region inside which the sheet conductivity differs from that in the region of the channel outside the trap. The sheet conductivity shift in the trap region is evaluated using the concept of flat band voltage shift associated with the trapping of one elementary charge in the trap region. The approach of flat band voltage shift is then advantageously used to derive first-order analytic expressions of the random telegraph signal (RTS) amplitude. In particular, it is found both, analytically and numerically that, in the case of small sheet conductivity modulation, the RTS amplitude becomes independent of the trap size. The numerical simulations show that the maximum RTS amplitude occurring in weak inversion is not a monotonic function of the trap size. Indeed, the normalized conductance fluctuation does increase as the trap area is reduced, passes through a maximum and finally decreases towards zero. The comparison of the simulation results with typical experimental RTS data shows an overall good agreement. In particular, it is clearly demonstrated from the RTS measurements that the gate voltage dependence of the normalized RTS amplitude can be strongly correlated to that of the transconductance to drain current ratio g(m)/I(d).