APPLICATION OF THE FLOATING-GATE TECHNIQUE TO THE STUDY OF THE N-MOSFET GATE CURRENT EVOLUTION DUE TO HOT-CARRIER AGING

被引：21

作者：

MARCHETAUX, JC ^{[1
]}

BOURCERIE, M ^{[1
]}

BOUDOU, A ^{[1
]}

VUILLAUME, D ^{[1
]}

机构：

[1] INST SUPER ELECTR N, SURFACES & INTERFACES LAB, CNRS, URA 253, F-59046 LILLE, FRANCE

来源：

IEEE ELECTRON DEVICE LETTERS | 1990年 / 11卷 / 09期

关键词：

D O I：

10.1109/55.62971

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The evolution of the gate current-voltage (Ig− Vgs) characteristics of n-MOSFET's induced by dc stresses at different gate voltage over drain voltage (Vds) ratios is studied by the floating-gate (FG) measurement technique. We show that tbe Ig−VgS curves are always lowered after aging, and that the kinetics are dependent on the aging conditions. A time-power law is representative of the Vgs = Vds case. We show that electron traps are created in the oxide by both hot-bole and hot-electron injection stresses. They are not present in the devices before aging. Moreover, they can be easily charged and discharged by short electron and bole injections, respectively. © 1990 IEEE

引用

页码：406 / 408

页数：3

共 10 条

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