QUADRUPLY SELF-ALIGNED MOS (QSA MOS) - A NEW SHORT-CHANNEL HIGH-SPEED HIGH-DENSITY MOSFET FOR VLSI

被引：8

作者：

OHTA, K ^{[1
]}

YAMADA, K ^{[1
]}

SAITOH, M ^{[1
]}

SHIMIZU, K ^{[1
]}

TARUI, Y ^{[1
]}

机构：

[1] VLSI TECHNOL RES ASSOC,COOPERAT LABS,TAKATSUKU,KAWASAKI,JAPAN

来源：

关键词：

D O I：

10.1109/T-ED.1980.20039

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1352 / 1358

页数：7

共 24 条

[1] DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS
DENNARD, RH
GAENSSLEN, FH
YU, HN
RIDEOUT, VL
BASSOUS, E
LEBLANC, AR
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) : 256 - 268
[2] 1 MU-M MOSFET VLSI TECHNOLOGY .2. DEVICE DESIGNS AND CHARACTERISTICS FOR HIGH-PERFORMANCE LOGIC APPLICATIONS
DENNARD, RH
GAENSSLEN, FH
WALKER, EJ
COOK, PW
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) : 247 - 255
[3] ESSL DV, 1979, ISSCC DIG TECH PAPER, P148
[4] GROVE AS, 1967, PHYS TECHNOL S, P23
[5] Koyanagi M., 1979, JPN J APPL PHYS S, V18
[6] PROFILE CONTROL BY REACTIVE SPUTTER ETCHING
LEHMANN, HW
WIDMER, R
[J]. JOURNAL OF VACUUM SCIENCE & TECHNOLOGY, 1978, 15 (02): : 319 - 326
[7] MORIMOTO M, 1976 P NAT CONV I EL, P2
[8] MURAMOTO S, 1978, IEDM, P185
[9] HIGH-SPEED LOGIC LSI USING DIFFUSION SELF-ALIGNED ENHANCEMENT DEPLETION MOS IC
OHTA, K
MORIMOTO, M
SAITOH, M
FUKUDA, T
MORINO, A
SHIMIZU, K
HAYASHI, Y
TARUI, Y
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1975, 10 (05) : 314 - 321
[10] OHTA K, 1980, ISSCC DIG TECH PAPER, P66