A CHARGE SHEET CAPACITANCE MODEL OF SHORT CHANNEL MOSFETS FOR SPICE

被引:55
作者
PARK, HJ
KO, PK
HU, CM
机构
[1] Department of Electrical Engineering, University of California, Berkeley, CA
关键词
D O I
10.1109/43.67791
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An analytic charge sheet capacitance model for short channel MOSFET's has been derived and implemented in SPICE. It is based on a surface potential formulation which computes the approximate surface potential without iterations. The dc current, charges, and their first and second derivatives are continuous under all operating regions. Equations for node charges have been derived to guarantee charge conservation. Short channel effects such as velocity saturation, channel length modulation, and channel-side-fringing-field capacitances have been included in the model equations. This model shows good agreements with the measured gate capacitance for long and short channel MOSFET's. The SPICE simulation of a ring oscillator using this model shows the significant variation of circuit performance due to the short channel effects on capacitances.
引用
收藏
页码:376 / 389
页数:14
相关论文
共 50 条
[1]  
BARTELS R, 1987, INTRO SPLINES USE CO, pCH3
[2]   CHARGE-SHEET MODEL OF MOSFET [J].
BREWS, JR .
SOLID-STATE ELECTRONICS, 1978, 21 (02) :345-355
[3]  
Chua L. O., 1975, COMPUTER AIDED ANAL
[4]  
COBBOLD RSC, 1970, THEORY APPLICATIONS, P272
[5]  
Conilogue R., 1982, International Electron Devices Meeting. Technical Digest, P654
[6]   CONDUCTANCE OF MOS TRANSISTORS IN SATURATION [J].
FROHMANB.D ;
GROVE, AS .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (01) :108-+
[7]  
GERALD CF, 1978, APPLIED NUMERICAL AN
[8]  
Grove A S, 1967, PHYS TECHNOLOGY SEMI
[9]   DESIGN THEORY OF A SURFACE FIELD-EFFECT TRANSISTOR [J].
IHANTOLA, HKJ ;
MOLL, JL .
SOLID-STATE ELECTRONICS, 1964, 7 (06) :423-430
[10]   ANALYSIS OF VELOCITY SATURATION AND OTHER EFFECTS ON SHORT-CHANNEL MOS-TRANSISTOR CAPACITANCES [J].
IWAI, H ;
PINTO, MR ;
RAFFERTY, CS ;
ORISTIAN, JE ;
DUTTON, RW .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (02) :173-184