SI BIPOLAR CHIP SET FOR 10-GB/S OPTICAL RECEIVER

被引：19

作者：

SUZAKI, T ^{[1
]}

SODA, M ^{[1
]}

MORIKAWA, T ^{[1
]}

TEZUKA, H ^{[1
]}

OGAWA, C ^{[1
]}

FUJITA, S ^{[1
]}

TAKEMURA, H ^{[1
]}

TASHIRO, T ^{[1
]}

机构：

[1] NEC CORP LTD,ULSI DEVICE DEV LABS,KANAGAWA 229,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1992年 / 27卷 / 12期

关键词：

D O I：

10.1109/4.173105

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Three Si bipolar IC's, a preamplifier, a gain-controllable amplifier, and a decision circuit, have been developed for 10-Gb/s optical receivers. A dual-feedback configuration with a phase adjustment capacitor makes it possible to increase the preamplifier bandwidth up to 11.2 GHz, while still retaining flat frequency response. The gain-controllable amplifier, which utilizes a current-dividing amplifier stage, has a 11.4-GHz bandwidth with 20-dB gain variation. A master-slave D-type flip-flop is also operated as the decision circuit at 10 Gb/s. On-chip coplanar lines were applied to minimize the electrical reflection between the IC's.

引用

页码：1781 / 1786

页数：6

共 29 条

[1] A SI-BIPOLAR TECHNOLOGY FOR OPTICAL FIBER TRANSMISSION RATES ABOVE 10 GB/S [J].